1. Field of the Invention
The present invention relates to the patterning of a semiconductor device. More particularly, the present invention relates to a method for forming a semiconductor hole.
2. Background of the Invention
A prevailing tendency in the semiconductor industry is to reduce the design dimension of the circuitry devices. Photolithography thereby becomes a significant step in the entire semiconductor manufacturing. Anything that is related to the structure of a semiconductor device, for example, the patterning of each layer of thin film, the critical dimension is determined by the photolithography process. In other words, the critical dimension of a device is determined by the advancement of the photolithography technique. Thus, the accuracy in the transferring of a photomask pattern plays an important role. If the transferring of a pattern is not accurate, the tolerance of critical dimension of a wafer is affected to lower the resolution of the exposure light.
The proximity effect is a major factor in determining the projection accuracy of a critical dimension onto a wafer surface during the transferring of a mask pattern. The proximity effect, on one hand, is a form of optical distortion associated with the diffraction of light beams when the light beams are being transmitted through the pattern of a photomask to form images on a wafer. On the other hand, proximity effect is a result from the interference between light beams due to the reflection of light from the substrate of a wafer through the photoresist on the wafer surface. The reflected light, however, would lead to multiple exposures to the photoresist, altering the actual amount of exposure light to the photoresist. This type of phenomenon is especially prominent as the line width approaches the wavelength of the light source. Currently, forming a circular or a elliptical hole employs either the optical proximity correction (OPC) or the 2-in-1 exposure method to resolve the above problem.
FIGS. 1A and 2A illustrate the process flow in fabricating a semiconductor hole using the conventional 2-in-1 exposure method. FIGS. 1B and 2B are cross-sectional views of 1A and 2A along the lines 1—1.
FIG. 1A is a schematic diagram illustrating an exposure process, while FIG. 1B is a cross-sectional view of FIG. 1A along the line 1—1.
Referring to FIGS. 1A and 1B, a dielectric layer 102 is formed on a substrate 100. A photoresist layer 104 is formed on the dielectric layer 102. Thereafter, a first photomask (not shown in Figure) is used to perform a first exposure to form a pattern on the photoresist layer 104, wherein the pattern formed on the first photomask comprises square patterns. After the pattern on the first photomask is exposed, the pattern is transferred to the photoresist layer 104 forming two diagonally allocated first regions 106. A second photomask (no shown) is then used to perform a second exposure to form a pattern on the photoresist layer 104, wherein the pattern on the second photomask comprises square patterns. Subsequent to exposing the second photomask, the pattern on the second photomask is transferred to the photoresist layer 104, forming two diagonally allocated second regions 108, wherein the two first regions 106 and the two second regions 108 are mirror images.
FIG. 2A is a schematic diagram illustrating a development process, while FIG. 2B is a cross-sectional view of FIG. 2A along the line 1—1.
Referring to FIGS. 2A and 2B, the photoresist layer 104 in the first regions 106 and the second regions 108 are removed by means of an exposure process to form holes 110 in the photoresist layer 104, exposing the dielectric layer 102.
However, in the above method of forming a hole 110 in a photoresist layer 104a, a leakage of light easily occurs during the first exposure and the second exposure. The double leakage of light will easily lead to the formation of a collapsible column 112 (as shown in FIG. 1A) located between the diagonally allocated first regions 106 and the diagonally allocated second regions 108. The peeling of the photoresist layer is thus resulted and defects in the dielectric layer in the subsequent process are generated. To prevent the collapse of the photoresist layer, the distance between the holes needs to be controlled. Thus, the pattern density can not be increased and further miniaturization of devices is hindered.